Researchers Develop Efficient Analog Method for Large-Scale Fourier Transforms

Researchers at Sandia National Laboratories, Infineon Technologies, and Arizona State University have introduced a novel method for efficiently executing large-scale Fourier transforms using analog in-memory computing. This approach could significantly improve the performance of applications reliant on fast Fourier transforms (FFT), which are essential in digital signal processing.

Fourier transforms are mathematical calculations that identify the frequencies within a signal, revealing their individual contributions. Traditionally, digital processors perform these calculations using the FFT algorithm, which decomposes a large Fourier transform into smaller ones, leading to faster computations with an O(N log N) scaling law.

However, analog computers, which process data as continuous physical quantities, have not typically been utilized for large Fourier transforms. By adapting the FFT algorithm for analog systems, researchers aim to leverage the energy efficiency of analog computing while maintaining the computational advantages of the FFT.

The team’s method, detailed in a paper published in Nature Electronics, involves breaking down a large Fourier transform into smaller calculations that can be executed in parallel on an analog chip, while other steps are completed digitally. T. Patrick Xiao, the paper’s first author, noted that this approach could enhance the efficiency of matrix multiplications, a critical function in AI processing.

Xiao explained, “For years, our group and many others have been exploring analog in-memory computing as a very efficient accelerator for matrix multiplications. But this hardware hadn’t been able to accelerate one of the most important, most widely used algorithms in all modern computing: the FFT. That seemed like a major limitation.”

The researchers utilized a SONOS flash memory array to perform the main Fourier transform calculations. Each memory cell retains electrical charge, allowing it to store values without power. This precision enables the scaling of the memory array to compute large FFTs efficiently.

In their experiments, the team demonstrated the capability to process a 65,536-point FFT, significantly surpassing previous analog systems that managed only up to 128 points. Xiao emphasized that the scaling properties of the FFT make it easier to handle larger transforms than before.

The new method could facilitate the execution of large transforms on analog chips without necessitating a proportionally large memory array, preserving the advantages of analog computing. This capability is particularly beneficial for applications in power-constrained environments, such as sensor systems not connected to the grid.

Xiao stated, “These computations are often done on power-starved sensor systems that are not connected to the grid. By adding the methods we presented to their repertoire, in-memory computing chips can now run both FFT-heavy and matrix-multiplication-heavy applications.”

According to the researchers’ modeling, their approach could reduce the energy required for signal processing, making it advantageous for edge computing, where devices process data locally. Christopher Bennett, the paper’s last author, remarked that implementing large FFTs using in-memory computing would significantly enhance edge sensing workloads, enabling higher resolution optical or radar imaging.

The researchers have tested their method on one-dimensional audio signals and two-dimensional images. They acknowledge that further testing is necessary to assess how computation errors in analog systems might affect performance in real-world applications. Future studies will focus on evaluating their system’s potential for edge computing, particularly in sensor systems.

Xiao concluded, “Finding or developing these workloads and using them to evaluate the technology is an important next step.”

Source: TechXplore